PARADIGM Methodology

The strategy of the project is to pull down the barriers that currently prevent large-scale penetration of ASPICs in a broad range of applications. As the main barriers we have identified the absence of generic integration technologies that support a broad range of functionalities, the strong coupling between design and technology development, the absence of dedicated design kits and component libraries, the cost of qualifying individual components, rather than at a platform level, the absence of generic packaging technologies and the absence of a large market.  Our objectives are to lower these barriers such that we can effectively launch and demonstrate the generic integration paradigm for a number of pilot applications.  Central is the creation of design tools which contain knowledge of the processes involved, but PARADIGM also targets generic packaging as a major element of the generic foundry process line. 

Generic process flow from applications idea to product

PARADIGM aims to establish the technology and methodologies for highly accurate and reproducible manufacturing of high-reliability circuits. Accuracy will be achieved through the construction of high quality building block libraries, powerful design systems and extensive characterization. Reproducibility comes from well understood, stable processes and extensive manufacturing controls

PARADIGM also proposes to work towards platform-level qualification (analogous to capability approval in microelectronics) i.e. reach a situation where in any design that meets design rules should not require additional qualification with respect to reliability. This is a new concept in InP PIC manufacture.  Reliability and reproducibility are consistent themes throughout PARADIGM, where work is designed to set the stage for later commercialization including full product qualification.